The present application relates to semiconductor device fabrication, and more particularly to semiconductor structures and methods that prevent electrical shorts between adjacent deep trenches containing embedded dynamic random access memory (eDRAM) devices.
Deep trench capacitors are used in a variety of semiconductor chips for high areal capacitance and low device leakage. A deep trench capacitor may be employed as a charge storage unit in a dynamic random access memory (DRAM), which may be provided as a stand-alone semiconductor chip, or may be embedded in a system-on-chip (SoC) semiconductor chip. A deep trench capacitor may also be employed in a variety of circuit applications such as a charge pump or a capacitive analog component in a radio-frequency (RF) circuit.
A deep trench capacitor is typically electrically connected to associated transistors through a conductive strap structure. Since the conductive strap is normally composed of a conductive semiconductor material such as doped polysilicon, and during later selective epitaxy processes in the formation of source/drain regions, the epitaxial growth of a semiconductor material may occur on the surface of the conductive strap structure. As dimensions of semiconductor devices scale, the distance between neighboring deep trenches becomes smaller. The epitaxial grown semiconductor material on the conductive strap structure may extend out of the deep trench to bridge the neighboring deep trenches, causing shorts between the neighboring deep trench capacitors. As such, structures and methods are needed to prevent epitaxial shorts between adjacent deep trenches having eDRAM devices.